AO6401A 30v p-channel mosfet general description product summary v ds i d (at v gs =-10v) -5a r ds(on) (at v gs =-10v) < 47m w r ds(on) (at v gs =-4.5v) < 64m w r ds(on) (at v gs =-2.5v) < 85m w symbol v ds v gs i dm t j , t stg symbol t 10s steady-state steady-state r q jl maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 37 110 50 t a =25c t a =70c pulsed drain current c continuous drain current drain-source voltage -30 the AO6401A uses advanced trench technology to provide excellent r ds(on) , low gate charge and operation with gate voltages as low as 2.5v. this device is s uitable for use as a load switch or in pwm applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted -30v maximum junction-to-ambient a units v 12 gate-source voltage a i d -5 -4 -28 c/w r q ja 47.5 74 62.5 junction and storage temperature range parameter typ max -55 to 150 c thermal characteristics power dissipation b p d t a =25c w 2 1.3 t a =70c tsop6 top view bottom view pin1 g ds d d g d s d top view 1 2 3 4 5 6 rev 1: mar 2011 www.aosmd.com page 1 of 5
AO6401A symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -1 t j =55c -5 i gss 100 na v gs(th) gate threshold voltage -0.5 -0.9 -1.3 v i d(on) -28 a 39 47 t j =125c 60 74 45 64 m w 59 85 m w g fs 18 s v sd -0.7 -1 v i s -2.5 a c iss 645 780 pf c oss 80 pf c rss 55 80 pf r g 4 7.8 12 w q g (10v) 14 17 nc q g (4.5v) 7 8.5 nc q gs 1.5 nc q gd 2.5 nc t d(on) 6.5 ns t r 3.5 ns t d(off) 41 ns t f 9 ns t rr 11 13.5 ns q rr 3.5 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. diode forward voltage i s =-1a,v gs =0v electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions reverse transfer capacitance i f =-5a, di/dt=100a/ m s v gs =0v, v ds =-15v, f=1mhz switching parameters body diode reverse recovery time v ds =-5v, i d =-5a on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-5a drain-source breakdown voltage v gs =-2.5v, i d =-1a v gs =-4.5v, i d =-4a forward transconductance r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =-250 m a v ds =0v, v gs =12v zero gate voltage drain current gate-body leakage current m w gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =-10v, v ds =-15v, i d =-5a gate source charge gate drain charge total gate charge body diode reverse recovery charge i f =-5a, di/dt=100a/ m s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r l =3 w , r gen =3 w a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initialt j =25c. d. the r q ja is the sum of the thermal impedance from junction to lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedance which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150c. the soa curve provides a single pulse ratin g. rev 1: mar 2011 www.aosmd.com page 2 of 5
AO6401A typical electrical and thermal characteristics 17 52 10 0 18 40 0 5 10 15 20 0 0.5 1 1.5 2 2.5 3 -v gs (volts) figure 2: transfer characteristics (note e) -i d (a) 20 40 60 80 100 0 2 4 6 8 10 -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -v sd (volts) figure 6: body-diode characteristics (note e) -i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =-2.5v i d =-1a v gs =-10v i d =-5a v gs =-4.5v i d =-4a 30 50 70 90 110 130 150 0 2 4 6 8 10 -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =-5v v gs =-4.5v v gs =-10v i d =-5a 25c 125c 0 5 10 15 20 25 0 1 2 3 4 5 -v ds (volts) fig 1: on-region characteristics (note e) -i d (a) v gs =-2.0v -2.5v -10v -4.5v -7v v gs =-2.5v rev 1: mar 2011 www.aosmd.com page 3 of 5
AO6401A typical electrical and thermal characteristics 0 2 4 6 8 10 0 5 10 15 q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 200 400 600 800 1000 0 5 10 15 20 25 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss c oss c rss v ds =-15v i d =-5a 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 10: single pulse power rating junction-to- ambient (note f) power (w) t a =25c 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 m s 10s 1ms dc r ds(on) limited t j(max) =150c t a =25c 100 m s 10ms 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =110c/w t on t p d rev 1: mar 2011 www.aosmd.com page 4 of 5
AO6401A vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) rev 1: mar 2011 www.aosmd.com page 5 of 5
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